Balancing the leakage currents in nanometer CMOS logic
- The imbalance of the currents leaked by CMOS standard cells when different logic values are applied to their inputs can be exploited as a side channel to recover the secrets of cryptographic implementations. Traditional side-channel countermeasures, primarily designed to thwart the dynamic leakage behavior, were shown to be much less powerful against this static threat. Thus, a special protection mechanism called Balanced Static Power Logic (BSPL) has been proposed very recently. Essentially, fundamental standard cells are re-designed to balance their drain-source leakage current independent of the given input. In this work, we analyze the BSPL concept in more detail and reveal several design issues that limit its effectiveness as a universal logic library. Although balancing drain-source currents remains a valid approach even in more advanced technology generations, we show that it is conceptually insufficient to achieve a fully data-independent leakage behavior in smaller geometries. Instead, we suggest an alternative approach, so-called improved BSPL (iBSPL). To evaluate the proposed method, we use information theoretic analysis. As an attack strategy, we have chosen Moments-Correlating DPA (MCDPA), since this analysis technique does not depend on a particular leakage model and allows a fair comparison. Through these evaluation methods, we show iBSPL demands fewer resources and delivers better balance in the ideal case as well as in the presence of process variations.
Author: | Bijan FadaeiniaORCiDGND, Thorben MoosORCiDGND, Amir MoradiORCiDGND |
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URN: | urn:nbn:de:hbz:294-85049 |
DOI: | https://doi.org/10.3390/app11157143 |
Parent Title (English): | Applied sciences |
Subtitle (English): | a challenging goal |
Publisher: | MDPI |
Place of publication: | Basel |
Document Type: | Article |
Language: | English |
Date of Publication (online): | 2022/01/06 |
Date of first Publication: | 2021/08/02 |
Publishing Institution: | Ruhr-Universität Bochum, Universitätsbibliothek |
Tag: | current leakage; hiding; side-channel analysis; static power consumption |
Volume: | 11 |
Issue: | 15, Article 7143 |
First Page: | 7143-1 |
Last Page: | 7143-18 |
Institutes/Facilities: | Horst Görtz Institut für IT-Sicherheit |
Dewey Decimal Classification: | Allgemeines, Informatik, Informationswissenschaft / Informatik |
open_access (DINI-Set): | open_access |
Licence (English): | Creative Commons - CC BY 4.0 - Attribution 4.0 International |